Digital ASIC Designer (EP-ESE-ME-2026-134-GRAP) — CERN

NuovoCHF 60'500 - 91'500
CERN · Geneva, GENEVA, Switzerland (GE)
Categoria: Altro Contratto: full-time Salario: CHF 60'500 - 91'500
Vai alla candidatura
Località
Genève
Contratto
full-time
Pubblicato
Ieri
SalarioCHF 60'500 - 91'500

Panoramica

Join CERN's EP-ESE-ME section in the development of a radiation-tolerant microcontroller ASIC for use in future particle physics detectors and accelerator systems.

Operating in highly challenging radiation environments, these systems require robust and reliable embedded electronics.

The project is based on an open-source RISC-V processing core and the CERN SOCRATES (System-On-Chip Radiation-Tolerant Ecosystem) framework for fault-tolerant SoC design.

Responsabilità principali

  • Your responsibilities:

Requisiti principali

  • Strong understanding of digital logic design.
  • Solid experience with digital IC design and RTL development (Verilog/SystemVerilog).
  • Familiarity with standard ASIC design flows (synthesis, place and route, timing closure).
  • Knowledge of RISC-V architecture and its ecosystem.
  • Experience with microcontroller-based embedded systems development, including firmware programming in C and peripheral interfacing. Skills:
  • RTL design and simulation (Verilog / SystemVerilog).
  • Familiarity with the digital ASIC design flow, including synthesis, place-and-route, timing closure, and sign-off activities.
  • Knowledge of fault-tolerant design techniques and radiation effects in CMOS circuits is an asset.
  • Microcontroller embedded systems development (firmware in C, peripheral interfacing, bare-metal programming).
  • Scripting and automation (Python or equivalent).
  • Linux/Unix working environment.
  • Curiosity and willingness to learn in a multidisciplinary environment.

Processo di candidatura

  • Analyse application requirements across CERN's accelerator complex and particle physics detector systems to define technical specifications for the microcontroller ASIC.
  • Contribute to the architecture, design, and validation of a radiation-tolerant microcontroller ASIC implemented in 65 nm or 28 nm CMOS technology.
  • Support the definition of the SoC architecture, including the selection and configuration of an appropriate RISC-V processing core.
  • Design, integrate, and validate peripheral IP blocks within the CERN SOCRATES framework.
  • fault-tolerant design methodologies, including triple modular redundancy (TMR) and single-event upset (SEU) mitigation techniques.
  • Participate in design verification activities and physical implementation, from RTL development through to tapeout.
  • Contribute to post-silicon testing, characterisation, and validation following chip fabrication.

Azienda e contesto

  • At CERN, the European Organization for Nuclear Research, we are pushing the frontiers of science and technology.
  • Our groundbreaking work brings together not only physicists but also a diverse range of professionals from engineering, technical, scientific, and administrative fields.
  • Together, we foster an environment where innovation and collaboration thrive.
  • Every day, we face exciting new challenges and opportunities to contribute to cutting-edge research that shapes our understanding of the universe.
  • We meet these challenges through the diverse perspectives within our teams, ensuring every contribution is valued and driving our shared sense of inclusion and purpose.
  • Diversity is a core value of CERN since its foundation, and it remains central to our mission and continued success.
  • If you are ready to be part of a dynamic, inclusive community pushing the boundaries of knowledge, CERN is the place where your curiosity and skills can thrive.
  • Be part of our mission to uncover what lies at the heart of the universe!
  • TAKE PART!
  • More information about us, here: careers.cern

Dettagli ulteriori

  • The successful candidate will contribute to the full development cycle, from requirements definition and system architecture to implementation, verification, and post-silicon validation.
  • Apply fault-tolerant design methodologies, including triple modular redundancy (TMR) and single-event upset (SEU) mitigation techniques.
  • Experience with microcontroller-based embedded systems development, including firmware programming in C and peripheral interfacing.
  • Spoken and written English, with a commitment to learn French. Eligibility criteria:
  • Contract duration: 24 months, with a possible extension up to 36 months maximum. Working hours: 40 hours per week Job flexibility: Fully Onsite Target start date: 01-October-2026 Job reference: EP-ESE-ME-2026-134-GRAP
  • Field of work: Electrical or Electronics Engineering Benchmark job: 200050 Electronics Engineer

Note e contenuto originale

  • Your profile:
  • Spoken and written English, with a commitment to learn French.
  • Eligibility criteria:
  • Contract duration: 24 months, with a possible extension up to 36 months maximum.
  • Working hours: 40 hours per week
  • Job flexibility: Fully Onsite
  • Target start date: 01-October-2026
  • Job reference: EP-ESE-ME-2026-134-GRAP
  • Field of work: Electrical or Electronics Engineering
  • Benchmark job: 200050
Vai alla candidatura

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